This invention relates to the field of digital output driver circuits and programmable logic circuits employing output drivers, and more particularly to output drivers programmable into the "tri-state" and "open-collector" configurations and programmable logic circuits employing such programmable drivers.
Two popular configurations for digital output circuits are "tri-state" and "open collector". These configurations drive a "bus", which is an electrical signal pathway which connects one or more outputs to one or more inputs. In the context of this patent application, "bus" is a broad term which means any trace or wire which connects integrated circuits or other electrical devices.
Tri-state (or "three-state") configurations are commonly used in circuits where only one output may be driving a particular bus at any one time. They are called tri-state because the output can achieve three possible states: high impedance, logical level low and logical level high.
The tri-state configuration is controlled by an input called Output Enable (OE). The polarity of OE determines whether the tri-state driver is enabled or disabled (on or off). When OE is of one polarity, the driver is in the high impedance state, in which case the driver is disabled. When OE is of the other polarity, the driver is in the logical low or high state, in which case the driver is enabled.
If the tri-state driver is disabled (off), the state of the driver is "high impedance", and the tri-state driver has no influence on the logical level of the bus it is connected to. It will allow the bus to achieve the logical level (high or low) which is determined by other outputs or circuit elements connected to the bus.
If the tri-state driver is enabled (on), then it acts as a totem-pole driver. A totem-pole driver is one which always tries to drive the level of the bus to the logical level indicated by the circuitry which controls it. For example, if the logic controlling the output indicates a logical level high, then the totem-pole output drives the bus to the logical high voltage level. If the logic indicates a logical level low, then the totem-pole output drives the bus level down to the logical low voltage level. Alternatively, the totem-pole driver may drive the bus to the opposite logical state from that of the logic controlling the driver, if the driver is an inverting driver.
It is important that only one totem-pole output attempts to drive a bus at the same time. If two totem-pole outputs try to drive the same bus simultaneously, and if futhermore they are trying to drive in opposite directions (one logical high and the other logical low), an unpredictable or ambiguous logical level will result on the bus. This will cause the entire circuit to function incorrectly.
To avoid this problem, designers must design circuits which contain tri-state outputs such that only one tri-state driver on the same bus can be enabled at the same time. For example, if there are four tri-state drivers on a bus, the designer must make sure that only one of those four be enabled (act as a totem-pole driver) at any one time. The other three must be disabled (in high impedance state).
In circuits where more than one output may drive the bus at the same time, the open-collector output configuration is commonly used. As with the totem-pole driver, if the logic which controls the open collector output indicates a logical level low (or logical level high in the case of an inverting driver), the open collector output will drive the bus to a low voltage level. However, if the logic which controls the open-collector output indicates a logical level high (or logical level low in the case of an inverting driver), the output will become high impedance, which means it will not influence the logical level of the bus. In the high impedance state the open-collector driver will allow the bus electrical signal level to attain any level (logical high or logical low) which is determined by other outputs or devices driving the bus.
The result of this nature of the open-collector output is that the logical level of that bus will be low if one or more of the open-collector outputs is driving the bus low. The logical level of the bus will be high if and only if all the logic which drives the open-collector outputs indicate a logical high level (or logical level low if the driver is inverting). Another way of stating this relationship is that the logical level of the bus is the logical NOR of all the open-collector outputs connected to the bus.
In situations where one or more outputs may be driving a bus simultaneously, using open-collector outputs eliminates the possibility of unpredictable or ambiguous bus logic levels. In many applications the designer requires that the bus be an "active low wired OR bus". In these cases open collector drivers are used.
There are many integrated circuits (ICs) available whose output circuits are tri-state configuration and many whose outputs are open-collector configuration. There are also many ICs available in which some of the outputs are open-collector and others are tri-state. These conventional output circuits are fixed in their configurations at either tri-state or open-collector; their configurations cannot be changed through programming with bipolar or MOS fuses.
In programmable logic circuits, output drivers have conventionally been used to drive the outputs of the programmable arrays. One type of conventional programmable logic circuit employs an array of AND gates and a second array of OR gates. Input signals to the circuits are carried by a number of input lines. The circuit is programmable by selectively connecting the input lines to the circuit and the input lines to the AND gates. If the connections between outputs of the AND gates and inputs of the OR gates are also programmable, the logic circuit is referred to conventionally as Field Programmable Logic Arrays (FPLAs). Some examples of FPLAs are Signetics parts PLS-100. Where the outputs of the AND gates are non-programmably connected to the inputs of the OR gates, the logic circuits are referred to as Programmable Array Logic (PAL). For an example of a PAL device, see U.S. Pat. No. 4,124,899 to Birkner et al.
The outputs of the OR gates in the FPLA or PAL circuits are then supplied to output driver circuits which, in turn, drive a bus. In some applications, it is desirable to use output drivers which are in the tri-state configuration; in other applications, it is desirable to use open-collector output drivers. In conventional programmable logic circuits, however, the configuration of the output drive is fixed and cannot be selected by the user. Most, if not all, of the programmable logic circuits available now offer only tri-state or totem-pole drivers. None offer open-collector drivers. It is therefore desirable to provide programmable logic circuits in which the configuration of the output drivers is also programmable to enable the user to select the desirable configuration for a particular application.